開(kāi)關(guān)電源的應(yīng)用——液晶顯示器電源的設(shè)計(jì)

開(kāi)關(guān)電源的應(yīng)用——液晶顯示器電源的設(shè)計(jì),開(kāi)關(guān)電源,應(yīng)用,利用,運(yùn)用,液晶顯示器,電源,設(shè)計(jì) 使用同步整流器的高效率開(kāi)關(guān)電源單元1.緒論這份報(bào)告描述了一種為主機(jī)電腦提供的絕緣開(kāi)關(guān)電源單元(DC/DC轉(zhuǎn)換器),這種單元是利用新開(kāi)發(fā)的用來(lái)次級(jí)調(diào)整的同步調(diào)整電路組成的.與傳統(tǒng)的開(kāi)關(guān)電源相比，它提高了6%的處理效率和現(xiàn)在已經(jīng)提高到了1.75倍的每單位量的功率輸出。因此這種電源單位具有高效率、低電壓和高功率輸出的特點(diǎn)。表格1顯示其規(guī)格的概要。圖1 就是這個(gè)電源單位的外形。整流方式 肖特基勢(shì)壘二極管(SBD) 同步整流器輸入電壓 (V dc) 200-373 240-400輸出電壓（V dc ） 3.6 2.5/3.3 可轉(zhuǎn)換輸出電流（A） 300 360輸出功率（W ） 1080 1188效率（% ） 75 81功率損耗（W ） 360 278大小 W/H/D（mm）120/381/2009.1（公升）60/381/2505.7（公升）每單位量功率輸出（瓦/公升）119 208重量（kg） 8.5 5.3氣流（m 3/min） 2.4 1.5工作溫度（℃） 0-45 0-45表格 1 說(shuō)明書(shū)圖1 以前的（左）和新單元（右）2.背景近年來(lái)，在規(guī)模集成電路技術(shù)作用下，已經(jīng)有了從晶體管-晶體管邏輯電路（TTL）和發(fā)射器連接邏輯電路（ECL）的利用到利用高綜合的互補(bǔ)金屬氧化物半導(dǎo)體（CMOS）的方法。與此同時(shí)中央處理器、存儲(chǔ)器和類(lèi)似物的邏輯部分以相當(dāng)快的速度正逐步走向小型化。盡管如此，把電源部分合成整體是有困難的，剛開(kāi)始它占用了主機(jī)里面的大部分空間。直到現(xiàn)在，水冷卻法已經(jīng)被用來(lái)冷卻邏輯部分。因?yàn)樗鋮s法是高效率的，它曾經(jīng)也用來(lái)冷卻電源。然而使用CMOS會(huì)減少邏輯部分使用的電量，這將制造水冷卻單元（一種昂貴的組成部分）使多余的電源組成部分小型化。因此，只對(duì)電源組成部分用水冷卻單元已經(jīng)變得更加禁止的昂貴。通過(guò)減少電源的內(nèi)在損耗和提高單位的處理效率使電源單位小型化已經(jīng)變得有必要。此外，電源電壓超過(guò)時(shí)間時(shí)從5.0V減少到3.3V，然后到2.5V。再著，由肖特基勢(shì)壘二極管SBD組成的次級(jí)整流部分的損耗已變得相當(dāng)重要。因此我們作出結(jié)論認(rèn)定減少次級(jí)整流部分的損失將在小型化過(guò)程中是最重要的因素，并且要而發(fā)展使用同步整流電路開(kāi)關(guān)電源單元。3.常規(guī)的電路和損耗分析圖2是一種開(kāi)關(guān)電源的外形，和圖3 顯示的是損失分析的結(jié)果。圖上表明次級(jí)整流部分損失占有超過(guò)40%整體損失。 根據(jù)理論分析的觀點(diǎn)，這分析的結(jié)果建議使用同步整流電路將改善處理效率，如圖4顯示。圖2 常規(guī)電路圖3 功率損耗比較圖4 效率比較4.當(dāng)前狀況的同步整流器同步整流的基本概念已長(zhǎng)期存在。 然而，其當(dāng)作一種產(chǎn)品實(shí)際的應(yīng)用只是最近才開(kāi)始。 在移動(dòng)設(shè)備中的同步整流器開(kāi)始于手?jǐn)y式電腦，是一種重要的技術(shù)有利于延長(zhǎng)這樣電源設(shè)備的電池使用壽命。自從由于同步整流的作用，當(dāng)非絕緣模式被使用控制電路就相對(duì)容易。 因此促進(jìn)開(kāi)關(guān)對(duì)ICs 的用途, 在CPUs中同步整流為多數(shù)DC/DC 交換器而使用 。但是當(dāng)絕緣模式（需要變壓器）被使用時(shí)，由于同步整流的作用使得控制電路有困難。因此，下面的問(wèn)題將會(huì)遇到。因而絕緣模式只能用在具體的產(chǎn)品。5.使用同步整流遇到的問(wèn)題圖5 顯示了同步整流電路的正常使用。有很多的問(wèn)題與這個(gè)電路相關(guān)。而且, 處理效率不是象我們期望一樣好。此外, 其他嚴(yán)重的問(wèn)題包括并行操作會(huì)遇到。圖5 早先同步整流電路1)低邊開(kāi)關(guān)的推動(dòng)不足正如圖6 說(shuō)明, 當(dāng)主要開(kāi)關(guān) (Q01,2 在圖5) 被關(guān)閉 , 變壓器被重新設(shè)置, 造成引起的電壓的消失。然后, 低邊開(kāi)關(guān)Q2 被關(guān)閉 ,電流流入BD2（Q2 的部分二極管） , 導(dǎo)致在損失的增量。因此需要加肖特基勢(shì)壘二極管D2與Q2 平行以增加物理量。當(dāng)電源的輸入電壓的范圍是寬廣的并且其輸入電壓是高的, 重新設(shè)置時(shí)間被變短和在當(dāng)電流流入D2期間總的時(shí)間是延長(zhǎng)的。因?yàn)槠涮幚硇蔬_(dá)到的幾乎與使用SBD 整流電路是一樣的 , 所以使用同步整流電路的正面作用不是非常重大的。圖6 早先電路波形2)在并行操作電流線路圖7 顯示沒(méi)有使用阻攔的二極管的單位并行操作。當(dāng)一個(gè)單位的主要開(kāi)關(guān)Q01,2 被關(guān)閉, 另一單位輸出提供電壓給Q2 門(mén)。結(jié)果 , 一個(gè)單位(Q2) 打開(kāi)。然后高電流流經(jīng)扼流圈而流失。這導(dǎo)致Q2 被損壞和輸出電壓減小。并且, 當(dāng)在各個(gè)單位的poweron 和 poweroff 信號(hào)的發(fā)生不一至的時(shí)候, 將產(chǎn)生同樣的問(wèn)題, 造成對(duì)單位的損傷。圖7 并行操作3)關(guān)斷時(shí)間的延遲在大多數(shù)當(dāng)前被發(fā)展的MOS-FET, 其Vgs 的門(mén)限電壓Vth 從4 V減少到2 V 。正如圖8 所示 , 當(dāng)由OV 門(mén)電壓( 斜率A)關(guān)斷Q1 和Q2, 瞬時(shí)斜率的緩和區(qū)顯示其極限。損失因由變壓器產(chǎn)生的電流而增加，原因是關(guān)斷時(shí)間的延遲。圖8 門(mén)限的兩種波形4)浪涌電壓因?yàn)橥秸麟娐返牟僮魇请p向的, 扼流圈L1 的電流將是連續(xù)的。當(dāng)負(fù)載電流小的時(shí)候, L1 電流以反向流動(dòng)。甚至在高邊開(kāi)關(guān)Q1最輕微的延遲導(dǎo)致L1 電流通路被切斷, 則浪涌電壓產(chǎn)生, 正如圖9 所示。結(jié)果 , Q1 和Q2 受到損傷。5)在并行操作過(guò)程中的循環(huán)電流當(dāng)有同步整流電路的各個(gè)單元是并行操作的， 如果甚至有最輕微輸出電壓的差別，則大電流會(huì)較高的輸出電壓?jiǎn)卧鞯捷^低的輸出電壓?jiǎn)卧?(這在圖10 說(shuō)明.) 通過(guò) U2 逆變器電流反饋到主要邊， 在此之后，它再一次被 U1 逆變器返回次級(jí)邊。 結(jié)果，大的循環(huán)電流在U1 和U2 之間流動(dòng)。 因此，即使有輕負(fù)載電流，在單位里產(chǎn)生的損失也像用重負(fù)載發(fā)生一樣的大。6.解決問(wèn)題和新的電路如下內(nèi)容描述一個(gè)解決用第5 部分描述的問(wèn)題的方法。 圖11顯示新同步整流電路。 圖13是一張說(shuō)明在并行操作的構(gòu)造的圖表。 圖9 產(chǎn)生浪涌電壓的裝置圖10 循環(huán)電流的根源圖11 新電路1)低邊開(kāi)關(guān)的推動(dòng)不足圖11顯示Q2和它的操作開(kāi)關(guān)Q3。正如圖12說(shuō)明的，當(dāng)Q01,2斷開(kāi)這樣就產(chǎn)生變壓器重新調(diào)節(jié)電壓，使得Q3斷開(kāi)然后正電壓通過(guò)D3加到Q2門(mén)兩端。當(dāng)電壓重新調(diào)節(jié)完成電壓被除去時(shí)，D3斷開(kāi)，Q2 門(mén)不導(dǎo)通。 在這點(diǎn)上，Q2保持在Ciss 中的門(mén)和源電路上的充電電荷并且終止。結(jié)果，并聯(lián)在Q2上的肖特基勢(shì)壘二極管顯得沒(méi)有必要。同步整流電路能夠最小化它自身的損耗。2）在并行操作中的電流環(huán)路圖11顯示的Q1和Q2通過(guò)隔離繞組（N2和N3 ）來(lái)驅(qū)動(dòng)，使得于其他單元的潛在電流可以避免，并且他們可以并行操作。圖 12 新電路波形3)關(guān)閉時(shí)間延遲如圖11所示，變壓器繞組 Q1是直接和門(mén)和源電路連接。當(dāng) Q1關(guān)閉，一個(gè)負(fù)電壓加在門(mén)電路上。當(dāng)Q01，2打開(kāi)，在變壓器 Q2上，正電壓產(chǎn)生。因此，門(mén)電荷通過(guò)Q3 放電。然后，相反的電壓加在Q2 的門(mén)電路并且Q1關(guān)閉。（圖8中的斜線B ）4）涌浪電壓當(dāng)一個(gè)等同于L1上的電流大小的電流被檢測(cè)到時(shí)（在圖11 中變壓器的電流被檢測(cè)到），Q4 在L1的電流或者相等的電流變成反向前關(guān)閉。通過(guò)關(guān)閉 Q4，反向電壓加到Q2 的門(mén)電路并且Q2 關(guān)閉。然后BD2 代替Q2 進(jìn)行整流。在感應(yīng)電流在反方向流動(dòng)時(shí)關(guān)閉Q2，能夠截止掉L1 上的反向電流并且避免了涌浪電壓。同時(shí)，整流器前面的下降從0.2v增加到1v。然而，因?yàn)樨?fù)載電流很小，沒(méi)有熱量失靈發(fā)生。5）平行操做中的循環(huán)電流循環(huán)電流通過(guò)利用對(duì)門(mén)電路驅(qū)動(dòng)和停止在截止盤(pán)繞的關(guān)閉區(qū)域的分離來(lái)消除掉。7．特性圖14說(shuō)明了新單元的效率和內(nèi)部損耗的標(biāo)準(zhǔn)結(jié)果。象在圖4上所期望的結(jié)果，損耗被降低23%，效率提高6%。圖13 并聯(lián)工作圖 14 新電源單元的效率8．結(jié)論我們發(fā)展了一種新的同步矯正電路來(lái)克服和傳統(tǒng)的同步整流電路關(guān)聯(lián)的缺點(diǎn)。我們同時(shí)也在著手一種冷的絕緣開(kāi)關(guān)電源提供單元的商業(yè)產(chǎn)品，同時(shí)它提供高效率，低電壓和高輸出電流。然而，因?yàn)镃PUs 這種邏輯部件繼續(xù)以一種很快的速度進(jìn)行小型化發(fā)展，開(kāi)關(guān)電源單元的小型化外圍設(shè)備的比以往需求更強(qiáng)烈。因此，我們將需要在允許我們實(shí)現(xiàn)更高的效率水平的發(fā)展技術(shù)上工作。9．參考文獻(xiàn)[1] Hirohiko Kizu, Hiroyuki Satoh, Shigeharu Yamashita,Kazutoshi Fuchigami, "WaterCooled Switching Power Supply" INTELEC '89[2] Teruhiko Kohama, Tamotsu Ninomiya, Masahito Shoyama, "Abnormal Phenomena Caused by Synchronous Rectifiers in Parallel-Module DC-DC Converter System" TECHNICAL REPORT OF IEICE. EE97-53,CMP97-158(1998-01)High-Efficiency Switching Power Supply Unit with Synchronous Rectifier Rectification method Input voltage (V dc) Output voltage (V dc) Output current (A) Output power (W) Efficiencv (%) Y. Nakayash i k i , H. Sh imamor i , T. Satoh. T. Ohno Fujitsu Limited 4-1-1 Kami kodanaka, Nakahara-ku Kawasak i -c i ty, 21 1-8588, Japan Schottky Synchronous (SBD) (Sync Rect) 3.6 2.5 / 3.3 switchable 300 360 1080 1188 75 81 barrier diode rectifier 200-373 240-400 1. Introduction Power loss (W) Size W /HID (mm) Power output per unit volume (W I Liter) Air flow (msl min) Weight (kg) Operating temperature This report describes an insulation type switching power supply unit (DC/DC converter) for mainframe computers that uses a newly developed synchronous rectifying circuit for the secondary rectification component. Compared with conventional switching power supply units, this unit offers 6% higher processing efficiency, and power output per unit volume that has been boosted by 1.75 times. As a result, this unit provides high efficiency, low voltage, and high power output. Table 1 shows the summary of specifications. The unit is illustrated in Figure 1. 360 278 9.1 (Liter) 5.7 (Liter) 120 1381 1200 60 I381 1250 ' 119 208 8.5 5.3 2.4 1.5 0 - 45 0 - 45 Table 1 Specifications 2. Background In recent years, in LSI technology, there has been a shift from the use of transistortransistor logic (TTL) and emittercoupled logic (ECL) to the use of highly integrated complementary metal-oxide semiconductors S. Yamash ita, K. Fuoh i gam i , T. Yamamoto. Fujitsu Denso Limited 1-1 7-3 Sakado, Takatsu-ku. Kawasak i-c i ty, 21 3-8586, Japan (CMOS). At the same time, the logic component of CPUs, memories, and the like have been undergoing miniaturization at a relatively rapid pace. However, since it the power supply component is difficult to integrate, it is beginning to occupy most of the space inside the mainframe. Until now, the water cooling method has been used to cool the logic component. Because the water cooling method is highly effective, it has been used in power supply unit too. However, using CMOS reduces the total amount of electric power used by the logic component, making the water cooling unit (an expensive component) miniaturizing the power supply component unnecessary. Therefore, it has become all the more prohibitively expensive to use a water cooling unit just for the power supply component alone. It has become necessary to miniaturize the power supply unit by reducing the internal loss of the power supply and Figure 1 Previous (left) and new unit (right) 0-7803-5069-3 198/$10.00 01998 IEEE 398 improving the processing efficiency of the unit. In addition, the powersupply voltage has been decreasing over time, from +5.0V to +3.3V, and then to +2.5V. Moreover, the loss of the secondary rectification component made up of the Schottky barrier diode(SBD) has come to be relatively important. We therefore concluded that reducing the loss of the secondary rectification component would be the most important factor in the miniaturization process, and developed a switching power supply unit that uses the synchronous rectifying circuit. 3. Conventional circuit and loss analysis Figure 2 shows an outline of the switching supply circuit, and Figure 3 shows the result of the loss analysis. These figures indicate that the loss of the secondary rectification component occupies more than 40% of the total loss. From the point of view of academic analysis, the results of this analysis suggested that using the synchronous rectifying circuit would lead to the improved processing efficiency shown in Figure 4. (7-F SBD Figure 2 Circuit of conventional unit 90 I I Q 80 W ic ! ..... i ............... ..y ............ ... i .............. .. ... i .............. ...... i ................ .. . j 0,: ~ :a . r)v ~ ~ 0 1 2 3 45 6 Output voltage (VI Synchronous rectifier (Sync Rect) - SBD rectifier --- Figure 4 Efficiency comparisons 4. Current circumstances of Sync Rect The fundamental concept of synchronous rectification has long existed. However, its practical application as a product has taken place only recently. Synchronous rectification in mobile equipment, beginning with laptop computers, is an important technology useful in extending the service life of the batteries that power such devices. Since it is relatively easy to control the circuit for the synchronous rectification operation when the non- insulation mode is used, thereby facilitating the switch to the use of ICs, synchronous rectification is used for the majority of DC/DC converters in CPUs. However, it is difficult to control the circuit for the synchronous rectification operation when the insulation method (required for the transformer) is used. Consequently, the problems given below were encountered. Accordingly, the insulation method is only used with specific products. 5. Problems encountered with Sync Rect Figure 5 shows the synchronous rectifying circuit generally used. There are a number of problems associated with this circuit. Moreover, the processing efficiency was not as good as we had anticipated. Furthermore, another serious problem involving parallel operation was encountered. Figure 3 Power loss comparisons 399 INPUT - OUTPUT Figure 5 Circuit of previous synchronous rectifier 1) Insufficient driving of low side switch As Figure 6 illustrates, when the main switches(Q01,2 in Figure 5) are turned off, the transformer is reset, resulting in the elimination of the generated voltage. Then, the low side switch Q2 is turned off, the current flows into the BD2 (which is a body diode of Q2), leading to an increase in the loss. The Schottky barrier diode D2 therefore needs to be mounted parallel with Q2 to increase the physical quantity. shortened and the amount of time during which the current flows \into the D2 is extended. Since the processing efficiency achieved is almost the. same as that obtained with the SBD rectifying circuit, the positive effects of using the synchronous rectifying circuit are not very significant. 2) Current detour at-parallel operation Figure 7 shows the units operating in parallel without using the blocking diode. When the main switches Q01,2 of one unit are turned off, the other unit outputs and applies the voltage to the Q2 gate. As a result, one unit (Q2) is turned on. Then high current flows through the choke coil into the drain. This results in the Q2 being damaged and the output voltage being reduced. Also, when the time of the generation of the poweron and poweroff signal differ between the units, it causes the same symptom to be generated, resulting in damage to the unit. Power supply f Other unit outputs I A 4\ I Y output I :- I I: D2 --f on Figure 7 Parallel operation F-7 -: I I Vt 0 plb-r' '.....'. L. vgsq Low I + magnifL vgs ov : Power dissipation Figure 6 Waveforms of previous circuit When the range of the input voltage of the power supply TofF-B << Toff-A is broad and such input voltage is high, the reset time is Figure 8 2-types of gate waveforms 400 3) Delay of turning off time In most of the currently developed MOS-FET, the threshold voltage Vth of Vgs is reduced from 4 V to 2 V. As Figure 8 illustrates, when turning off Q1 and Q2 by OV gate voltage (slope A), the moderate part of the slope of the transient phenomena indicates the threshold. The loss is increased by the pass current that flows from the transformers due to the delay in the turning off time. 4) Surge voltage Since the operation of synchronous rectifying circuit is bi-directional, the current of the choke coil L1 will not be discontinuous. When the load current is small, the L1 current flows in the reverse direction. Even the slightest delay in turning on the high side switch Q1 causes the current route of L1 to be cut, and the surge voltage to be generated, as Figure 9 illustrates. As a result, Q1 and Q2 incur damage. I" 3odv diode l- I+ T Figure 9 Mechanism of producing a surge voltage 5) Circulating current in parallel operation When the units with the synchronous rectifying circuit are operated in parallel, if there is even the slightest difference in the output voltages, the large current flows from the higher output voltage unit into the lower output voltage unit. (This is illustrated in Figure 10.) The current is fed back to the primary side by the U2 inverter, after which it is once again returned to the secondary side by the U1 inverter. As a result, a large circulating current flows between U1 and U2. Therefore, even with a light-load current, the loss generated in the unit is as extensive as that occurring with heavy loads. I12 Iout I1 , 1 I I IOUt = I2 - I3 Figure 10 Root of circulating current 6. Solving problems and the new circuit The following describes a solution to the problems described in Section 5. Figure 11 shows the new synchronous rectifying circuit. Figure 13 is a diagram illustrating the configuration at parallel operation. 1) Insufficient driving of low side switch Figure 11 shows Q2 and its driving switch Q3. As Figure 12 illustrates, when Q01,2 are turned off and it generates the transformer reset voltage, Q3 is turned off and the positive voltage is applied to the Q2 gate through D3. When the reset is completed and the voltage is removed, D3 is turned off and the Q2 gate is disconnected. At this point, Q2 holds the electric charge in Ciss between th gate and the source and stays on. As a result, the Schottky barrier diode connected to Q2 in parallel becomes unnecessary. The synchronous rectifying circuit is able to minimize the loss on its own. t 2) Current detour at parallel operation Since both Q1 and Q2 use separate windings (N2 and N3) for the drive as shown in Figure 1 1 ,, a sneak current from other unit can be avoided, and they can operate in parallel. 3) Delay of turning off time As shown in Figure 11, winding of transformer Q1 is directly connected between the gate and the source. When Q1 is turned off, a negative voltage can be applied to the gate. In the transformer of Q2, positive voltage is -. " I *Q4 is controlled by the current of L1 Figure 11 New circuit 4) Surge voltage When a current equivalent to the current of L1 is detected (the transformer current is detected in Figure ll), Q4 is turned off before the current of L1 or the equivalent flows in the negative direction. By turning off Q4, the reverse voltage is applied to the Q2 gate and Q2 is turned off. BD2 then operates the rectification instead of Q2. Turning off Q2 before the choke coil current flows in the negative direction can stop the negative current of L1 and avoid the surge voltage. At this time, the forward drop of the rectifier increases from 43 on 0.2 V to 1 V. However, because the load current is small, no thermal failure occurs. 0 ............... ............... .......... ............... ................ ........ Vds QO tLLr-Lr 0 Off Off Gs'; A 0 vgs2 5) Circulating current in parallel operation The circulating current is eliminated by using the separate winding for the gate driving and stopping the synchronous rectifier in the cut-off area of the choke coil. 7. Characteristics Figure 12 Waveform of new circuit ' Figure 14 shows the measured results of the internal loss and the efficiency of this new unit. As expected for the results in Figure 4, the loss is reduced by 23% and the efficiency is improved by 6%. generated when Q01,2 are turned on. Thereby, the gate charge is discharged through Q3. Then the reverse voltage is applied to the Q2 gate and Q1 is promptly turned off. (slope B in Figure 8) 402 17- I I 31 I I I I I i I 90 80 E 60 50 .$ 40 g 30 20 10 0 CI 70 Figure 13 Parallel operation 300 250 - 200 $ 100 g U) 150 f a 50 0 0 20 40 60 80 100 Load ratio (%) +Efficiency at 2.5V +Power loss at 2.5V +Efficiency at 3.3V --t Power loss at 3.3V Figure 14 Efficiency of new power supply unit 8. Conclusion We developed a new synchronous rectifying circuit that can overcome all of the disadvantages that associated with conventional synchronous rectifying circuits. We have also embarked on the commercially production of an insulation type switching power supply unit that is air cooled, and offers high-efficiency, low voltage and high current output. However, since the logic component of CPUs continues to undergo miniaturization at a rapid pace, the additional miniaturization of the power supply unit is more than ever in demand. Accordingly, we will ,need to work on developing technologies that will allow us /to achieve higher levels of efficiency. 9. Reference Hirohiko Kim, Hiroyuki Satoh, Shigeharu Yamashita, Kazutoshi Fuchigami, "WaterCooled Switching Power Supply" INTELEC '89 Teruhiko Kohama, Tamotsu Ninomiya, Masahito Shoyama, "Abnormal Phenomena Caused by Synchronous Rectifiers in Parallel-Module DC-DC Converter System" TECHNICAL REPORT OF IEICE. EE97-53, CMP97-158(1998-01) 403